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      PowerPro® RTL Low-Power

      The only RTL Low-Power solution that brings together analysis, optimization, and formally-verified automatic RTL generation, enabling designers to get maximum, accurate power savings fast.

      Whether it is to improve battery life, reduce electricity costs or comply with regulations, power has become a critical design constraint and a key differentiating factor.

      The PowerPro RTL Low-Power Platform provides a complete solution to accurately measure, interactively explore and thoroughly optimize power during the RTL development cycle.

      Using PowerPro, designers can evaluate power consumption directly on the RTL design rather than going through the time-consuming steps of physical implementation. PowerPro’s physical-aware flow provides the necessary accuracy to the estimated power number.

      Throughout the development process, the power exploration flow provides guidance on where power is wasted and how to reduce it. Designers can also perform “what-if” analysis, interactively assessing the impact on power of potential design transformations.

      Finally, as the RTL nears completion, designers can leverage the optimization flow to automatically generate new, power-optimized RTL, which is formally verified using PowerPro’s SLEC® technology, saving hours/days of verification time. Using patented deep sequential analysis technology, PowerPro sweeps the RTL design to find the most advanced logic conditions possible to shut off redundant sections of a chip.

      Using PowerPro, designers achieve maximum power reduction for their SoC.

      PowerPro RTL Low-Power Platform

      Power Estimation

      PowerPro provides the industry’s most accurate register-transfer level (RTL) power estimation solution. This dramatic advantage in accuracy over other solutions is made possible by PowerPro’s new and unique technology developed and optimized for FinFET designs..

      Guided Power Reduction

      PowerPro’s power reduction features are fully integrated within the RTL power estimation flow. Used throughout the RTL design cycle, PowerPro interactively guides designers to achieve the lowest power implementations.

      Automatic Power Reduction

      Low-Power RTL and all of the optimizations performed by PowerPro are comprehensively verified by the SLEC Pro formal verification engine.

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